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Datasheet File OCR Text:

CAP1005 / CAP1006
5 and 6 Channel Capacitive Touch Sensor
PRODUCT FEATURES
General Description
The CAP1006 and CAP1005 are multiple channel Capacitive Touch sensors. The CAP1006 contains six (6) individual Capacitive Touch sensor inputs while the CAP1005 contains five (5) sensors. Both devices offer programmable sensitivity for use in touch sensor applications. Each sensor automatically recalibrates to compensate for gradual environmental changes. The CAP1005 / CAP1006 offers multiple power states operating at low quiescent currents. During the Standby mode of operation, one or more Capacitive Touch Sensors are active. The Deep Sleep mode of operation is the lowest power state available drawing 3uA of current. During this mode, no sensors are active. Communications will wake the device. Datasheet
Applications
Desktop and Notebook PC's LCD Monitors Printers Appliances
Features
Six (6) Capacitive Touch Sensor Inputs - CAP1006 Five (5) Capacitive Touch Sensor Inputs - CAP1005
-- Programmable sensitivity -- Automatic recalibration -- Individual thresholds for each button
Flexible Capacitive Touch Sense algorithm Multiple Communication interfaces
-- SMBus / I2C compliant interface (CAP1006-1 only) -- SMSC BC-Link interface (CAP1006-2 only) -- SPI communications (CAP1005 only) -- 3uA quiescent current in Deep Sleep -- Samples one or more channels in Standby -- Open Drain or Push-Pull
Low Power operation
Available in 10-pin 3mm x 3mm RoHS compliant DFN package
CAP1006 Block Diagram
CAP1005 Block Diagram
VDD
GND
VDD
GND
SMCLK1 / BC_CLK Capacitive Sensing Algorithm SMBus Slave Protocol
1
2
SPI_CS#
2
SMDATA / BC_DATA ALERT#1 / BC_IRQ#2
Capacitive Sensing Algorithm
SPI Protocol
SPI_CLK SPI_MOSI SPI_MISO
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CS1 CS2 CS3 CS4 CS5 CS6
1 2
= CAP1006-1 = CAP1006-2
CS1
CS2
CS3
CS4
CS5
Note: I2C is a trademark of NXP semiconductor. BC-Link is a trademark of SMSC.
SMSC CAP1005 / CAP1006
DATASHEET
Revision 1.1 (08-05-09)
5 and 6 Channel Capacitive Touch Sensor Datasheet
ORDERING INFORMATION
ORDERING NUMBER CAP1006-1-AIA-TR CAP1006-2-AIA-TR CAP1005-1-AIA-TR PACKAGE 10-pin DFN 3mm x 3mm (Lead Free RoHS compliant) 10-pin DFN 3mm x 3mm (Lead Free RoHS compliant) 10-pin DFN 3mm x 3mm (Lead Free RoHS compliant) FEATURES Six Capacitive Touch Sensors, SMBus interface Six Capacitive Touch Sensors, BC-Link interface Five Capacitve Touch sensors, Full Duplex SPI interface
REEL SIZE IS 4,000 PIECES
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2009 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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Revision 1.1 (08-05-09)
2
SMSC CAP1005 / CAP1006
DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
Table of Contents
Chapter 1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Chapter 3 Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 SMBus (I2C) Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 SPI Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.3 BC-Link Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Management Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 SMBus Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 SMBus Address and RD / WR Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 SMBus Data Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 SMBus ACK and NACK Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.5 SMBus Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.6 SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.7 SMBus and I2C Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 SMBus Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.2 Block Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.3 SMBus Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.4 Block Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.5 SMBus Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.6 SMBus Receive Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SPI Interface (CAP1005 only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.1 SPI Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.2 SPI_CS# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.3 Address Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.4 SPI Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Normal SPI Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.1 Reset Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.2 Set Address Pointer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.3 Write Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.4 Read Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BC-Link Interface (CAP1006-2 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 13 13 13 14 14 14 14 14 14 14 15 15 15 16 16 16 16 17 17 17 17 18 18 19 20 20 21 22
3.2
3.3
3.4
3.5
3.6
Chapter 4 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1 4.2 Power States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Capacitive Touch Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.1 Sensing Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.2 Recalibrating Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3.1 Sensor Interrupt Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 25 25 25 25 25
4.3
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Chapter 5 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Main Status Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noise Flag Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Delta Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensitivity Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
5.1 5.2 5.3 5.4 5.5 5.6
29 30 30 31 31 33
SMSC CAP1005 / CAP1006
Revision 1.1 (08-05-09)
DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.17
5.18 5.19 5.20 5.21 5.22 5.23 5.24 5.25
Sensor Enable Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Configuration 2 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Averaging and Sampling Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calibration Activate Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Repeat Rate Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiple Touch Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recalibration Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Noise Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.17.1 Sensor Noise Threshold 1 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.17.2 Sensor Noise Threshold 2 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Channel Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Sensitivity Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Base Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Manufacturer ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
33 34 36 36 38 38 39 39 40 41 42 42 42 43 43 45 45 46 46 47 47
Chapter 6 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.1 6.2 CAP1006 and CAP1005 Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Chapter 7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
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Revision 1.1 (08-05-09)
4
SMSC CAP1005 / CAP1006
DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
List of Figures
Figure 1.1 Figure 1.2 Figure 3.1 Figure 3.1 Figure 3.1 Figure 3.2 Figure 3.3 Figure 3.4 Figure 3.5 Figure 3.6 Figure 4.1 Figure 4.2 Figure 4.3 Figure 4.4 Figure 6.1 Figure 6.2 Figure 6.3 Figure 6.4 Figure 6.5 Figure 6.6 CAP1006 Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 CAP1005 Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Example SPI Bus Communication - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SPI Reset Interface Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SPI Set Address Pointer Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SPI Write Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SPI Read Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SPI Read Command - Normal Mode - Full . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 System Diagram for CAP1006 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 System Diagram for CAP1005 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Sensor Interrupt Behavior - Repeat Rate Enabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Sensor Interrupt Behavior - No Repeat Rate Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10-Pin DFN 3mm x 3mm Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 10-Pin DFN 3mm x 3mm Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 10-Pin DFN 3mm x 3mm PCB Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 CAP1006-1 Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 CAP1006-2 Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 CAP1005 Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
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SMSC CAP1005 / CAP1006
5
Revision 1.1 (08-05-09)
DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
List of Tables
Table 1.1 Pin Description for CAP1006 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 1.2 Pin Description for CAP1005 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 1.3 Pin Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 2.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3.1 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 3.2 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 3.3 Block Write Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 3.4 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 3.5 Block Read Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 3.6 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 3.7 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 5.2 Main Status Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 5.3 Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5.4 Noise Flag Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5.5 Sensor Delta Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5.6 Sensitivity Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5.7 DELTA_SENSE Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 5.8 BASE_SHIFT Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 5.9 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 5.10 Sensor Enable Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 5.11 Sensor Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 5.12 MAX_DUR Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 5.13 RPT_RATE Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 5.14 Sensor Configuration 2 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 5.15 Averaging and Sampling Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 5.16 AVG Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 5.17 CYCLE_TIME Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 5.18 Calibration Activate Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 5.19 Interrupt Enable Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 5.20 Repeat Rate Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 5.21 Multiple Touch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 5.22 B_MULT_T Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 5.23 Recalibration Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 5.24 NEG_DELTA_CNT Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 5.25 CAL_CFG Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 5.26 Sensor Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 5.27 Sensor Noise Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 5.28 CSx_BN_TH Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 5.29 Standby Channel Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 5.30 Standby Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 5.31 STBY_AVG Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 5.32 STBY_CY_TIME Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 5.33 Standby Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 www..com Table 5.34 STBY_SENSE Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 5.35 Standby Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 5.36 Sensor Base Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 5.37 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 5.38 Vendor ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 5.39 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 7.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
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DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
Chapter 1 Pin Description
CAP1006 3mm x 3mm DFN CS1 ALERT# / BC_IRQ# SMDATA / BC_DATA SMCLK / BC_CLK VDD 1 2 3 4 5 10 CS2 9 8 7 6 CS3 CS4 CS5 CS6
GND
Figure 1.1 CAP1006 Pin
Table 1.1 Pin Description for CAP1006 PIN NUMBER 1
PIN NAME CS1
PIN FUNCTION Capacitive Touch Sensor 1 ALERT# - Active low alert / interrupt output usable for SMBus alert (CAP1006-1) BC_IRQ# - Active low interrupt / optional for BC-Link (CAP1006-2) SMDATA - Bi-directional, open-drain SMBus data - requires pull-up resistor (CAP1006-1) BC_DATA - Bi-directional, open-drain BC-Link data - requires pullup resistor (CAP1006-2) SMCLK - SMBus clock input - requires pull-up resistor (CAP1006-1) BC_CLK - BC-Link clock input (CAP1006-2)
PIN TYPE AIO OD (5V) OD (5V) DIOD (5V) DIO DI (5V) DI (5V) Power AIO AIO AIO AIO
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2
ALERT# / BC_IRQ#
3
SMDATA / BC_DATA
4
SMCLK / BC_CLK VDD CS6 CS5 CS4 CS3
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6 7 8 9
Positive Power supply Capacitive Touch Sensor 6 Capacitive Touch Sensor 5 Capacitive Touch Sensor 4 Capacitive Touch Sensor 3
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SMSC CAP1005 / CAP1006
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5 and 6 Channel Capacitive Touch Sensor Datasheet
Table 1.1 Pin Description for CAP1006 (continued) PIN NUMBER 10 Bottom Pad
PIN NAME CS2 GND
PIN FUNCTION Capacitive Touch Sensor 2 Ground
PIN TYPE AIO Power
CAP1005 3mm x 3mm DFN SPI_CS# SPI_MOSI SPI_MISO SPI_CLK VDD 1 2 3 4 5 10 CS1 9 8 7 6 CS2 CS3 CS4 CS5
GND
Figure 1.2 CAP1005 Pin Diagram
Table 1.2 Pin Description for CAP1005 PIN NUMBER 1 2 3 4 5 6 www..com 7 8 9
PIN NAME SPI_CS# SPI_MOSI SPI_MISO SPI_CLK VDD CS5 CS4 CS3 CS2
PIN FUNCTION Active low chip-select for SPI bus SPI_MOSI - SPI Master-Out-Slave-In port SPI Master-In-Slave-Out data port SPI clock input Positive Power supply Capacitive Touch Sensor 5 Capacitive Touch Sensor 4 Capacitive Touch Sensor 3 Capacitive Touch Sensor 2
PIN TYPE DI (5V) DI (5V) DO DI (5V) Power AIO AIO AIO AIO
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5 and 6 Channel Capacitive Touch Sensor Datasheet
Table 1.2 Pin Description for CAP1005 (continued) PIN NUMBER 10 Bottom Pad
PIN NAME CS1 GND
PIN FUNCTION Capacitive Touch Sensor 1 Ground
PIN TYPE AIO Power
The pin types are described in detail below. All pins labeled with (5V) are 5V tolerant. APPLICATION NOTE: For the 5V tolerant pins that have a pull-up resistor, the pull-up voltage must not exceed 3.6V when the CAP1005 / CAP1006 is unpowered.
Table 1.3 Pin Types PIN TYPE Power DI AIO DIOD DESCRIPTION This pin is used to supply power or ground to the device. Digital Input - This pin is used as a digital input. This pin is 5V tolerant. Analog Input / Output -This pin is used as an I/O for analog signals. Digital Input / Open Drain Output- This pin is used as a digital I/O. When it is used as an output, it is open drain and requires a pull-up resistor. This pin is 5V tolerant. Open Drain Digital Output - this pin is used as a digital output. It is open drain and requires a pull-up resistor. This pin is 5V tolerant. Push-pull Digital Output - This pin is used as a digital output and can sink and source current. Push-pull Digital Input / Output - This pin is used as an I/O for digital signals.
OD
DO DIO
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9
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DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
Chapter 2 Electrical Specifications
Table 2.1 Absolute Maximum Ratings Voltage on 5V tolerant pins (V5VT_PIN) Voltage on 5V tolerant pins (|V5VT_PIN - VDD|) Note 2.2 Voltage on VDD pin Voltage on any other pin to GND Package Power Dissipation up to TA = 85C for 10 pin DFN (see Note 2.3) Junction to Ambient (JA) Operating Ambient Temperature Range Storage Temperature Range ESD Rating, All Pins, HBM Note 2.1 -0.3 to 5.5 0 to 3.6 -0.3 to 4 -0.3 to VDD + 0.3 0.7 77.7 -40 to 125 -55 to 150 8000 V V V V W C/W C C V
Stresses above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. For the 5V tolerant pins that have a pull-up resistor, the voltage difference between V5VT_PIN and VDD must never exceed 3.6V. The Package Power Dissipation specification assumes a recommended thermal via design consisting of a 2x2 matrix of 0.3mm (12mil) vias at 1.0mm pitch connected to the ground plane with a 1.6 x 2.3mm thermal landing.
Note 2.2 Note 2.3
Table 2.2 Electrical Specifications VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC SYMBOL MIN TYP MAX UNIT CONDITIONS
DC Power Supply Voltage Supply Current VDD ISTBY 3.0 3.3 160 3.6 210 V uA Standby state active 1 sensor monitored Default conditions (8 avg, 70ms cycle time) Deep Sleep state active No communications TA < 85C Average current Capacitive Sensing Active
IDSLEEP
3
10
uA
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IDD 300 500 uA
Capacitive Touch Sensor
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Table 2.2 Electrical Specifications (continued) VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC Maximum Base Capacitance Detectable Capacitive Shift SYMBOL CBASE MIN TYP 50 0.1 2 MAX UNIT pF pF CONDITIONS Pad untouched Pad touched
CTOUCH
I/O Pins - SPI_CS#, SPI_MOSI, and ALERT# pins Output Low Voltage Input High Voltage Input Low Voltage Leakage Current VOL VIH VIL ILEAK 2.0 0.8 5 0.4 V V V uA powered or unpowered TA < 85C ISINK_IO = 4mA
SMDATA / BC_DATA / SPI_MSIO / SPI_MISO and SMCLK / BC_CLK / SPI_CLK pins Output Low Voltage Output High Voltage Input High Voltage Input Low Voltage Leakage Current VOL VOH VIH VIL ILEAK VDD 0.4 2.0 0.8 5 0.4 V V V V uA powered or unpowered TA < 85C pull-up voltage < 3.6V ISINK_IO = 8mA ISOURCE_IO = 8mA
SMBus First Communication
tSMB
15
ms
SMBus Timing (CAP1006-1 only) Input Capacitance Clock Frequency Spike Suppression Bus free time Start to Stop Setup Time: Start Setup Time: Stop Data Hold Time Data Setup Time www..com Clock Low Period Clock High Period Clock/Data Fall time Clock/Data Rise time CIN fSMB tSP tBUF tSU:STA tSU:STP tHD:DAT tSU:DAT tLOW tHIGH tFALL tRISE 1.3 0.6 0.6 0.6 0.6 1.3 0.6 300 300 6 72 10 5 400 50 pF kHz ns us us us us us us us ns ns Min = 20+0.1CLOAD ns Min = 20+0.1CLOAD ns
SMSC CAP1005 / CAP1006
11
Revision 1.1 (08-05-09)
DATASHEET
5 and 6 Channel Capacitive Touch Sensor Datasheet
Table 2.2 Electrical Specifications (continued) VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC Capacitive Load SYMBOL CLOAD MIN TYP MAX 400 UNIT pF CONDITIONS per bus line
BC-Link Timing (CAP1006-2 only) Clock Period Data Hold Time Data Setup Time Clock Duty Cycle tCLK tHD:DAT tSU:DAT Duty 250 0 30 40 50 60 ns ns ns % Data must be valid before clock
SPI Timing (CAP1005 only) Clock Period Clock Low Period Clock High Period Clock Rise / Fall time Data Output Delay Data Setup Time Data Hold Time SPI_CS# to SPI_CLK setup time Wake Time tP tLOW tHIGH tRISE / tFALL tD:CLK tSU:DAT tHD:DAT tSU:CS tWAKE 20 20 0 10 20 250 0.4 x tP 0.4 x tP 0.6 x tP 0.6 x tP 0.1 x tP 10 ns ns ns ns ns ns ns ns us SPI_CS# asserted to CLK assert
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5 and 6 Channel Capacitive Touch Sensor Datasheet
Chapter 3 Communications
3.1 Communications
The CAP1006-1 communicates using the SMBus or I2C protocol. The CAP1006-2 communicates using the 2-wire proprietary BC-Link protocol. The CAP1005 communicates using 4-wire SPI bus. Regardless of the communications mechanism, the device functionality remains unchanged.
3.1.1
SMBus (I2C) Communications
When configured to communicate via the SMBus, the CAP1006 supports the following protocols: Send Byte, Receive Byte, Read Byte, and Write Byte. In addition, the device supports I2C formatting for block read and block write protocols. See Section 3.2 and Section 3.3 for more information on the SMBus bus and protocols respectively.
3.1.2
SPI Communications
The CAP1005 is configured to communicate via SPI bus, using a 4-wire protocol. It does not support the 3-wire protocol. See Section 3.4 and Section 3.5 for more information on the SPI bus and protocols respectively.
3.1.3
BC-Link Communications
When BC-Link communications are used, the CAP1006 supports the read byte protocol and the write byte protocol. See Section 3.6 for more information on the BC-Link Bus and protocols respectively.
APPLICATION NOTE: Upon power up, the CAP1006 will not respond to any communications for up to 15ms. After this time, full functionality is available.
3.2
System Management Bus
The CAP1006 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 3.1. Stretching of the SMCLK signal is supported; however, the CAP1006 will not stretch the clock signal.
TLOW
THIGH
THD:STA TSU:STO
SMCLK
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THD:STA
TRISE
TFALL
THD:DAT
TSU:DAT
TSU:STA
SMDATA
TBUF
P
S
S - Start Condition
S
P - Stop Condition P
Figure 3.1 SMBus Timing Diagram
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5 and 6 Channel Capacitive Touch Sensor Datasheet
3.2.1
SMBus Start Bit
The SMBus Start bit is defined as a transition of the SMBus Data line from a logic `1' state to a logic `0' state while the SMBus Clock line is in a logic `1' state.
3.2.2
SMBus Address and RD / WR Bit
The SMBus Address Byte consists of the 7-bit client address followed by the RD / WR indicator bit. If this RD / WR bit is a logic `0', then the SMBus Host is writing data to the client device. If this RD / WR bit is a logic `1', then the SMBus Host is reading data from the client device. The CAP1006-1 responds to SMBus address 0101_000(r/w).
3.2.3
SMBus Data Bytes
All SMBus Data bytes are sent most significant bit first and composed of 8-bits of information.
3.2.4
SMBus ACK and NACK Bits
The SMBus client will acknowledge all data bytes that it receives. This is done by the client device pulling the SMBus Data line low after the 8th bit of each byte that is transmitted. This applies to both the Write Byte and Block Write protocols. The Host will NACK (not acknowledge) the last data byte to be received from the client by holding the SMBus data line high after the 8th data bit has been sent. For the Block Read protocol, the Host will ACK each data byte that it receives except the last data byte.
3.2.5
SMBus Stop Bit
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic `0' state to a logic `1' state while the SMBus clock line is in a logic `1' state. When the CAP1006 detects an SMBus Stop bit, and it has been communicating with the SMBus protocol, it will reset its client interface and prepare to receive further communications.
3.2.6
SMBus Timeout
The CAP1006 includes an SMBus timeout feature. Following a 30ms period of inactivity on the SMBus where the SMCLK pin is held low, the device will timeout and reset the SMBus interface. The timeout function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the Configuration register (see Section 5.6).
3.2.7
SMBus and I2C Compliance
The major difference between SMBus and I2C devices is highlighted here. For complete compliance information refer to the SMBus 2.0 specification. 1. Minimum frequency for SMBus communications is 10kHz. 2. The client protocol will reset if the clock is held low longer than 30ms.
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3. The client protocol will reset if both the clock and the data line are high for longer than 150us (idle condition). 4. I2C devices do not support the Alert Response Address functionality (which is optional for SMBus). 5. I2C devices support block read and write differently. I2C protocol allows for unlimited number of bytes to be sent in either direction. The SMBus protocol requires that an additional data byte indicating number of bytes to read / write is transmitted. The CAP1006 supports I2C formatting only.
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5 and 6 Channel Capacitive Touch Sensor Datasheet
3.3
SMBus Protocols
The CAP1006 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Block Read, Receive Byte as valid protocols as shown below. The CAP1006 also supports the I2C block read and block write protocols. Finally, it will respond to the Alert Response Address protocol but is not in full compliance. All of the below protocols use the convention in Table 3.1.
Table 3.1 Protocol Format DATA SENT TO DEVICE Data sent DATA SENT TO THE HOST Data sent
3.3.1
SMBus Write Byte
The Write Byte is used to write one byte of data to a specific register as shown in Table 3.2.
Table 3.2 Write Byte Protocol SLAVE ADDRESS 0101_000 REGISTER ADDRESS XXh REGISTER DATA XXh
START 1 ->0
WR 0
ACK 0
ACK 0
ACK 0
STOP 0 -> 1
3.3.2
Block Write
The Block Write is used to write multiple data bytes to a group of contiguous registers as shown in Table 3.3. It is an extension of the Write Byte Protocol.
APPLICATION NOTE: When using the Block Write protocol, the internal address pointer will be automatically incremented after every data byte is received. It will wrap from FFh to 00h.
Table 3.3 Block Write Protocol SLAVE ADDRESS 0101_000 REGISTER ADDRESS XXh REGISTER DATA XXh
START 1 ->0 REGISTER DATA XXh
WR 0 REGISTER DATA XXh
ACK 0
ACK 0 REGISTER DATA XXh
ACK 0
ACK 0
ACK 0
... ...
ACK 0
STOP 0 -> 1
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Revision 1.1 (08-05-09)
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5 and 6 Channel Capacitive Touch Sensor Datasheet
3.3.3
SMBus Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 3.4.
Table 3.4 Read Byte Protocol
START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START CLIENT ADDRESS RD ACK REGISTER DATA NACK STOP
1->0
0101_000
0
0
XXh
0
1 ->0
0101_000
1
0
XXh
1
0 -> 1
3.3.4
Block Read
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in Table 3.5. It is an extension of the Read Byte Protocol.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically incremented after every data byte is received. It will wrap from FFh to 00h.
Table 3.5 Block Read Protocol
START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START SLAVE ADDRESS RD ACK REGISTER DATA
1->0
ACK
0101_000
REGISTER DATA
0
ACK
0
REGISTER DATA
XXh
ACK
0
REGISTER DATA
1 ->0
ACK
0101_000
...
1
REGISTER DATA
0
NACK
XXh
STOP
0
XXh
0
XXh
0
XXh
0
...
XXh
1
0 -> 1
3.3.5
SMBus Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 3.6.
Table 3.6 Send Byte Protocol SLAVE ADDRESS 0101_000 REGISTER ADDRESS XXh
START 1 -> 0
WR 0
ACK 0
ACK 0
STOP 0 -> 1
3.3.6
SMBus Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 3.7.
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Table 3.7 Receive Byte Protocol SLAVE ADDRESS 0101_000
START 1 -> 0
RD 1
ACK 0
REGISTER DATA XXh
NACK 1
STOP 0 -> 1
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SMSC CAP1005 / CAP1006
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5 and 6 Channel Capacitive Touch Sensor Datasheet
3.4
SPI Interface (CAP1005 only)
The SMBus has a predefined packet structure, the SPI does not. The SPI Bus can operate in two modes of operation, normal 4-wire mode and bi-directional 3-wire mode. The CAP1005 only supports normal 4-wire mode. All SPI commands consist of 8-bit packets set to a specific slave device (identified by the CS pin). The SPI bus will latch data on the rising edge of the clock and the clock and data both idle high. All commands are supported via both operating modes. The supported commands are: Reset Serial interface, set address pointer, write command and read command. Note that all other codes received during the command phase are ignored and have no effect on the operation of the device.
tP tLOW tHIGH
SPI_CLK
tRISE
tFALL
SPI_MSIO or SPI_MOSI or SPI_MISO
tSU:DAT tD:CLK tHD:DAT
Figure 3.1 SPI Timing
3.4.1
SPI Normal Mode
In the normal mode of operation, there are dedicated input and output data lines. The host communicates by sending a command along the CAP1005 SPI_MOSI data line and reading data on the SPI_MISO data line. Both communications occur simultaneously which allows for larger through put of data transactions. All basic transfers consist of two 8 bit transactions from the Master device while the slave device is simultaneously sending data at the current address pointer value. Data writes consist of two or more 8-bit transactions. The host sends a specific write command followed by the data to write the address pointer. Data reads consist of one or more 8-bit transactions. The host sends the specific read data command and continues clocking for as many data bytes as it wishes to receive.
3.4.2
SPI_CS# Pin
The SPI Bus is a single master, multiple slave serial bus. Each slave has a dedicated CS pin (chip select) that the master asserts low to identify that the slave is being addressed. There are no formal www..com addressing options.
3.4.3
Address Pointer
All data writes and reads are accessed from the current address pointer. In both Bi-directional mode and Full Duplex mode, the Address pointer is automatically incremented following every read command or every write command.
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The address pointer will return to 00h after reaching FFh.
3.4.4
SPI Timeout
The CAP1005 does not detect any timeout conditions on the SPI bus.
3.5
Normal SPI Protocols
When operating in normal mode, the SPI bus internal address pointer is incremented depending upon which command has been transmitted. Multiple commands may be transmitted sequentually so long as the SPI_CS# pin is asserted low. Figure 3.1 shows an example of this operation.
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SPI_CS#
SPI_MOSI
7Ah
7Ah
7Dh
41h
7Eh
66h
7Dh
41h
7Fh
7Fh
7Fh
7Fh
7Fh
7Fh
7Dh
40h
7Fh
7Fh
SPI_MISO
XXh (invalid)
XXh (invalid)
YYh (invalid)
YYh (invalid)
XXh (invalid)
45h
AAh (invalid)
AAh (invalid)
55h (invalid)
66h
AAh
AAh
55h
80h
43h
78h
XXh (invalid)
56h
SPI Address Pointer SPI Data output buffer
00h XXh
41h 45h
42h AAh
41h 55h
41h 66h
42h AAh
43h 55h
44h 80h
45h 43h
46h 78h
40h 80h
40h 56h
Register Address / Data
40h / 56h 41h / 45h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 45h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h Indicates SPI Address pointer incremented
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
Figure 3.1 Example SPI Bus Communication - Normal Mode
3.5.1
Reset Interface
Resets the Serial interface whenever two successive 7Ah codes are received. Regardless of the current phase of the transaction - command or data, the receipt of the successive reset commands resets the Serial communication interface only. All other functions are not affected by the reset operation.
5 and 6 Channel Capacitive Touch Sensor Datasheet
SPI_CS#
SPI_CLK
Master SPDOUT SPI_MOSI
`0'
`1'
`1'
`1'
`1'
`0'
`1'
`0'
`0'
`1'
`1'
`1'
`1'
`0'
`1'
`0'
Reset - 7Ah
Reset - 7Ah
SPI_MISO
Invalid register data
00h - Internal Data buffer empty
Master Drives
Slave Drives
Figure 3.2 SPI Reset Interface Command - Normal Mode
3.5.2
Set Address Pointer
The Set Address Pointer command sets the Address pointer for subsequent reads and writes of data. The pointer is set on the rising edge of the final data bit. At the same time, the data that is to be read is fetched and loaded into the internal output buffer but is not transmitted.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI
`0'
`1'
`1'
`1'
`1'
`1'
`0'
`1'
Register Address
Set Address Pointer - 7Dh
SPI_MISO
Unknown, Invalid Data
Unknown, Invalid Data
Master Drives
Slave Drives
Address pointer set
Figure 3.3 SPI Set Address Pointer Command - Normal Mode
3.5.3
Write Data
The Write Data protocol updates the contents of the register referenced by the address pointer. As the command is processed, the data to be read is fetched and loaded into the internal output buffer but not transmitted. Then, the register is updated with the data to be written. Finally, the address pointer www..com is incremented.
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SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI
Write Command - 7Eh
Data to Write
SPI_MISO
Unknown, Invalid Data
Old Data at Current Address Pointer
Master Drives
Slave Drives 1. Data written at current address pointer 2. Address pointer incremented
Figure 3.4 SPI Write Command - Normal Mode
3.5.4
Read Data
The Read Data protocol is used to read data from the device. During the normal mode of operation, while the device is receiving data, the CAP1005 is simultaneously transmitting data to the host. For the Set Address commands and the Write Data commands, this data may be invalid and it is recommended that the Read Data command is used.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI `0' `1' `1' `1' `1' `1' `1' `1' `0' `1' `1' `1' `1' `1' `1' `1'
First Read Command - 7Fh
SPI_MISO Invalid, Unknown Data *
Subsequent Read Commands - 7F
Data at Current Address Pointer
Master Drives
Slave Drives
Address Pointer Incremented **
* The first read command after any other command will return invalid data for the first byte. Subsequent read commands will return the data at the Current Address Pointer ** The Address Pointer is incremented 8 clocks after the Read Command has been received. Therefore continually sending Read Commands will result in each command reporting new data. Once Read Commands have been finished, the last data byte will be read during the next 8 clocks for any command
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Figure 3.5 SPI Read Command - Normal Mode
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1. Register Read Address updated to Current SPI Read Address pointer
1. Register Read Address incremented = current address pointer + 1
1. Register Read Address updated to Current SPI Read Address pointer. 2. Register Read Address incremented = current address pointer +1 - end result = register address pointer doesn't change
SPI_CS#
SPI_MISO
`0'
`1'
`1'
`1'
`1'
`1'
`1'
`1'
XXh
`0'
`1'
`1'
`1'
`1'
`1'
`1'
`1'
Read Command - 7Fh
Master SPDOUT SPI_MOSI Data at previously set register address = current SPI_CLK address pointer Data at previously set register address = current address pointer (SPI)
Subsequent Read Commands - 7Fh
Data at previously set register address = current address pointer (SPI)
Master Drives 1. Output buffer transmitted = data at previous address 1. Register data loaded into pointer + 1 = current address output buffer = data at current pointer address pointer
Slave Drives Register Data loaded into 1. Register data loaded into Output buffer = data at current output buffer = data at current address pointer + 1 address pointer 1. SPI Read Address Incremented = new current 1. Output buffer transmitted = address pointer data at current address pointer 2. Register Read Address +1 Incremented = current address 1. Output buffer transmitted = 2. Flag set to increment SPI data at previous register pointer +1 Read Address at end of next 8 address pointer + 1 = current clocks address pointer
1. Output buffer transmitted = data at current address pointer +1 2. Flag set to increment SPI Read Address at end of next 8 clocks
Figure 3.6 SPI Read Command - Normal Mode - Full
3.6
BC-Link Interface (CAP1006-2 only)
The BC-Link is a proprietary bus developed to allow communication between a host controller device to a companion device. This device uses this serial bus to read and write registers and for interrupt processing. The interface uses a data port concept, where the base interface has an address register, data register and a control register, defined in the SMSC's 8051's SFR space. Refer to documentation for the BC-Link comptabile host controller for details on how to access the CAP1006 via the BC-Link Interface.
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Chapter 4 General Description
The CAP1006 / 1005 are multiple channel Capacitive Touch sensors. The CAP1006 contains six (6) individual Capacitive Touch sensor inputs while the CAP1005 contains five (5) sensors. Both devices offer programmable sensitivity for use in touch sensor applications. Each sensor automatically recalibrates to compensate for gradual environmental changes. The CAP1005 / CAP1006 offers multiple power states operating at low quiescent currents during its Deep Sleep state. It can monitor one or more channels while in a lower power state and respond to communications normally. The device communicates with a host controller using the SPI bus (CAP1005 only), SMSC BC-Link bus (CAP1006-2 only), or via SMBus / I2C (CAP1006-1 only). The host controller may poll the device for updated information at any time or it may configure the device to flag an interrupt whenever a touch is detected on any sensor. A typical system diagram for the CAP1006 is shown in Figure 4.1 and a system diagram for the CAP1005 is shown in Figure 4.2.
VDD
Embedded Controller
SMCLK1 / BC_CLK2
Touch Button Touch Button
CAP1006
CS1 CS2
SMDATA1 / BC_DATA2
ALERT#
Touch Button Touch Button Touch Button
CS3
CS4
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Touch Button
CS5
CS6
1 2
= CAP1006-1 = CAP1006-2
Figure 4.1 System Diagram for CAP1006
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VDD
Embedded Controller
SPI_CLK
SPI_CS#
SPI_MISO
Touch Button Touch Button Touch Button
CAP1005
CS1 CS2
SPI_MOSI
Touch Button Touch Button
CS3
CS4
CS5
Figure 4.2 System Diagram for CAP1005
4.1
Power States
The CAP1005 / CAP1006 has three operating states depending on the status of the STBY and DSLEEP bits. When the device transitions between power states, previously detected touches (for inactive channels) are cleared and the status bits reset. 1. Fully Active - The device is fully active. It is monitoring all active Capacitive Sensor channels.
2. Standby - The device is in a lower power state. It will measure a programmable number of channels (as determined by the Standby Channel register - default none). Interrupts will still be generated based on the active channels. The device will still respond to communications normally and can www..com be returned to the Fully Active state of operation by clearing the STBY bit. 3. Deep Sleep - The device is in its lowest power state. It is not monitoring any Capacitive Sensor channels. It can be awakened by SMBus or SPI communications targeting the device (which will cause the DSLEEP bit to be automatically cleared). APPLICATION NOTE: The CAP1006-2, which communicates using the BC-Link protocol, does not support Deep Sleep.
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4.2
Capacitive Touch Sensing
The CAP1005 / CAP1006 contains six (6) (CAP1006) or five (5) (CAP1005) independent Capacitive Touch Sensor inputs. Each sensor has dynamic range to detect a change of capacitance due to a touch. Additionally, each sensor can be configured to be automatically and routinely re-calibrated.
4.2.1
Sensing Cycle
Each Capacitive Touch Sensor has controls to be activated and included in the sensing cycle. When the device is active, it automatically initiates a sensing cycle and repeats the cycle every time it finishes. The cycle polls through each active Sensor starting with CS1 and extending through CS6. As each Capacitive Touch Sensor is polled, its measurement is compared against a baseline "not touched" measurement. If the delta measurement is large enough, then a touch is detected and an interrupt generated. The sensing cycle time is programmable (see Section 5.10).
4.2.2
Recalibrating Sensors
Each sensor is regularly recalibrated at an adjustable rate. By default, the recalibration routine stores the average 256 previous measurements and periodically updates the base "Not Touched" setting for the Capacitive Touch Sensor input. It is possible that the device loses sensitivity to a touch. This may happen as a result of a noisy environment, an accidental recalibration during a touch, or other environmental changes. When this occurs, then the base untouched sensor may generate negative delta count values. The device will detect this condition based on a programmable number of consecutive negative delta readings. When it detects the condition, the CAP1005 / CAP1006 will automatically re-calibrate the base-count settings. During this recalibration, the device will not respond to touches.
4.3
ALERT# Pin
The ALERT# pin is an active low output that is driven when an interrupt event is detected. Whenever an interrupt is generated, the INT bit (see Section 5.1) is set. The ALERT# pin is cleared when INT bit is cleared by the user. Additionally, when the INT bit is cleared by the user, status bits are only cleared if no touch is detected.
4.3.1
Sensor Interrupt Behavior
The sensor interrupts are generated in one of two ways: 1. An interrupt is generated when a touch is detected and when a release is detected (see Figure 4.4). 2. If the repeat rate is enabled (see Section 5.6), then, so long as the touch is held, another interrupt will be generated based on the programmed repeat rate (see Figure 4.3).
When the repeat rate is enabled, the device uses an additional control called MPRESS that determines whether a touch is flagged as a simple "touch" or a "press and hold". The MPRESS[3:0] bits set a minimum press timer. When the button is touched the timer begins. If the sensor is released before the minimum press timer expires, then it is flagged as a touch and an interrupt is generated upon the release. If the sensor detects a touch for longer than this timer value, then it is flagged as a "press www..com and hold" event. So long as the touch is held, interrupts will be generated at the programmed repeat rate and upon a release.
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Interrupt on Touch Touch Detected
Polling Cycle (35ms) Interrupt on Release Button Repeat Rate (175ms) Button Repeat Rate (175ms) Button Repeat Rate (175ms)
ALERT Pin / INT bit
Button Status
SMBus Write to INT bit
Figure 4.3 Sensor Interrupt Behavior - Repeat Rate Enabled APPLICATION NOTE: The host may need to poll the device twice to determine that a release has been detected.
Interrupt on Touch
Polling Cycle (35ms) Interrupt on Release
Touch Detected ALERT Pin / INT bit Button Status SMBus Write to INT bit
Figure 4.4 Sensor Interrupt Behavior - No Repeat Rate Enabled
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Chapter 5 Register Description
The registers shown in Table 5.1 are accessible through the communications protocol. An entry of `-' indicates that the bit is not used and will always read `0'.
Table 5.1 Register Set in Hexadecimal Order REGISTER ADDRESS 00h 03h 0Ah 10h 11h 12h 13h 14h 15h 1Fh 20h 21h DEFAULT VALUE 00h 00h 00h 00h 00h 00h 00h 00h 00h 2Fh 20h 3Fh
R/W R/W R R R R R R R R R/W R/W R/W
REGISTER NAME Main Status Control Sensor Status Noise Flag Status Sensor 1 Delta Count Sensor 2 Delta Count Sensor 3 Delta Count Sensor 4 Delta Count Sensor 5 Delta Count Sensor 6 Delta Count Sensitivity Control Configuration Sensor Enable
FUNCTION Controls general power states and power dissipation Returns the state of the sampeld Capacative Touch Sensor Stores the noise flags for sensors Stores the delta count for CS1 Stores the delta count for CS2 Stores the delta count for CS3 Stores the delta count for CS4 Stores the delta count for CS5 Stores the delta count for CS6 Controls the sensitivity of the threshold and delta counts and data scaling of the base counts Controls general functionality Controls whether the Capacitive Touch Sensor inputs are sampled Controls reset delay and auto-repeat delay for sensors operating in the full power state Controls the MPRESS controls for all sensors Controls averaging and sampling window Activates manual re-calibration for Capacative Touch Sensors Enables Interrupts associated with Capacative Touch Sensors Enables repeat rate for Capacative Touch Sensors Determines the number of simultaneous touches to flag a multiple touch condition Determines re-calibration timing and sampling window
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PAGE Page 29 Page 30 Page 30 Page 31 Page 31 Page 31 Page 31 Page 31 Page 31 Page 31 Page 33 Page 33
22h
R/W
Sensor Configuration Sensor Configuration 2 Averaging and Sampling Config Calibration Activate Interrupt Enable Repeat Rate Enable Multiple Press Configuration Recalibration Configuration
A4h
Page 34
23h 24h 26h 27h
R/W R/W R/W R/W
07h 1Dh FFh 3Fh 3Fh
Page 36 Page 36 Page 38 Page 38 Page 39
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2Ah
R/W
80h
Page 39
2Fh
R/W
8Bh
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Table 5.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS DEFAULT VALUE
R/W
REGISTER NAME
FUNCTION Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 1 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 2 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 3 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 4 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 5 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 6 Stores controls for selecting the noise threshold for sensors 1 - 4 Stores controls for selecting the noise threshold for sensors 5 - 6
PAGE
30h
R/W
Sensor 1 Threshold
40h
Page 41
31h
R/W
Sensor 2 Threshold
40h
Page 41
32h
R/W
Sensor 3 Threshold
40h
Page 41
33h
R/W
Sensor 4 Threshold
40h
Page 41
34h
R/W
Sensor 5 Threshold
40h
Page 41
35h
R/W
Sensor 6 Threshold Sensor Noise Threshold 1 Sensor Noise Threshold 2
40h
Page 41
38h 39h
R/W R/W
55h 55h
Page 42 Page 42
Standby Configuration Registers 40h 41h 42h 43h 50h 51h 52h R/W R/W R/W R/W R R R R R R Standby Channel Standby Configuration Standby Sensitivity Standby Threshold Sensor 1 Base Count Sensor 2 Base Count Sensor 3 Base Count Sensor 4 Base Count Sensor 5 Base Count Sensor 6 Base Count Controls which sensors are enabled while in standby Controls averaging and cycle time while in standby Controls sensitivity settings used while in standby Stores the touch detection threshold for active sensors in standby Stores the reference count value for sensor 1 Stores the reference count value for sensor 2 Stores the reference count value for sensor 3 Stores the reference count value for sensor 4 Stores the reference count value for sensor 5 Stores the reference count value for sensor 6 00h 1Dh 02h 40h C8h C8h C8h C8h C8h C8h Page 43 Page 43 Page 45 Page 45 Page 46 Page 46 Page 46 Page 46 Page 46 Page 46
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Table 5.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS DEFAULT VALUE 44h Page 46 Product ID CAP1005 FEh FFh R R Manufacturer ID Revision Stores a fixed value that identifies each product Stores a fixed value that identifies SMSC Stores a fixed value that represents the revision number 45h 5Dh 81h Page 47 Page 47
R/W
REGISTER NAME Product ID CAP1006
FUNCTION Stores a fixed value that identifies each product
PAGE
FDh
R
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when power is first applied to the part and the voltage on the VDD supply surpasses the POR level as specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to undefined registers will not have an effect.
5.1
Main Status Control Register
Table 5.2 Main Status Control Register
ADDR 00h
R/W R/W
REGISTER Main Status Control
B7 -
B6 -
B5 STBY
B4 DSLEEP
B3 -
B2 -
B1 -
B0 INT
DEFAULT 00h
The Main Status and Control register controls the primary power state of the device. Bit 5 - STBY - Enables Standby. `0' (default) - Sensor scanning is active. `1' - Capacitive Touch Sensor scanning is limited to the sensors set in the Standby Channel register (see Section 5.18). The status registers will not be cleared until read. Sensors that are no longer sampled will flag a release and then remain in a non-touched state. Bit 4 - DSLEEP - Enables Deep Sleep by deactivating all functions. This bit will be cleared when SPI or SMBus are received targeting the CAP1005 / CAP1006. If the CAP1005 / CAP1006 is configured to communicate using the BC-Link protocol, then this bit is ignored. `0' (default) - Sensor scanning is active. `1' - All sensor scanning is disabled. The status registers are automatically cleared and the INT bit is cleared. Bit 0 - INT - Indicates that there is an interrupt. This bit is only set if the ALERT# pin has been asserted. If a channel detects a touch and its associated interrupt enable bit is not set to a logic `1' then no action is taken.
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This bit is cleared by writing a logic `0' to it. When this bit is cleared, the ALERT# pin will be deasserted and all status registers will be cleared if the condition has been removed. If the WAKE/SPI_MOSI pin is asserted as a result of a touch detected while in Standby, it will likewise be deasserted when this bit is cleared. Note that this pin is not driven when communicating via the 4-wire SPI protocol `0' - No interrupt pending.
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`1' - A touch has been detected on one or more channels and the interrupt has been asserted.
5.2
Status Registers
Table 5.3 Status Registers
ADDR
03h
R/W
R
REGISTER
Sensor Status
B7
-
B6
-
B5
CS6
B4
CS5
B3
CS4
B2
CS3
B1
CS2
B0
CS1
DEFAULT
00h
The Sensor Status Registers store status bits that indicate a touch has been detected. A value of `0' in any bit indicates that no touch has been detected. A value of `1' in any bit indicates that a touch has been detected. All status bits are cleared when the device enters the Deep Sleep (DSLEEP = `1' - see Section 5.1). All status bits are cleared when the INT bit is cleared and if a touch on the respective Capacitive Touch Sensor is no longer present. If a touch is still detected, then the bits will not be cleared (but this will not cause the interrupt to be asserted - see Section 5.6). Bit 5 - CS6 - Indicates that a touch was detected on Sensor 6. Bit 4 - CS5 - Indicates that a touch was detected on Sensor 5. Bit 3 - CS4 - Indicates that a touch was detected on Sensor 4. Bit 2 - CS3 - Indicates that a touch was detected on Sensor 3. Bit 1 - CS2 - Indicates that a touch was detected on Sensor 2. Bit 0 - CS1 - Indicates that a touch was detected on Sensor 1.
5.3
Noise Flag Status Registers
Table 5.4 Noise Flag Status Registers
ADDR
0Ah
R/W
R
REGISTER
Noise Flag Status
B7
-
B6
-
B5
CS6_ NOISE
B4
CS5_ NOISE
B3
CS4_ NOISE
B2
CS3_ NOISE
B1
CS2_ NOISE
B0
CS1_ NOISE
DEFAULT
00h
The Noise Flag Status registers store status bits that are generated from the analog block if the detected noise is above the operating region of the analog detector. These bits indicate that the most recently received data from the sensor is invalid and should not be used for touch detection. Furthermore, so long as the bit is set for a particular channel, no decisions are made with the data. A touch is not detected, and a release is not detected. These bits are not sticky and will be cleared automatically if the analog block does not report a noise error.
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5.4
Sensor Delta Count Registers
Table 5.5 Sensor Delta Count Registers
ADDR 10h 11h 12h 13h 14h 15h
R/W R R R R R R
REGISTER Sensor 1 Delta Count Sensor 2 Delta Count Sensor 3 Delta Count Sensor 4 Delta Count Sensor 5 Delta Count Sensor 6 Delta Count
B7 Sign Sign Sign Sign Sign Sign
B6 64 64 64 64 64 64
B5 32 32 32 32 32 32
B4 16 16 16 16 16 16
B3 8 8 8 8 8 8
B2 4 4 4 4 4 4
B1 2 2 2 2 2 2
B0 1 1 1 1 1 1
DEFAULT 00h 00h 00h 00h 00h 00h
The Sensor Delta Count registers store the delta count that is compared against the threshold used to determine if a touch has been detected. The count value represents a change in input due to the capacitor associated with a touch on one of the sensors and is referenced to a calibrated base "Not touched" count value. The delta is an instantaneous change and is updated once per sensor per sensing cycle (see Section 4.2.1 - sensor cycle). The value presented is a standard 2's complement number. In addition, the value is capped at a value of 7Fh. A reading of 7Fh indicates that the sensitivity settings are too high and should be adjusted accordingly (see Section 5.5). The value is also capped at a negative value of FFh for negative delta counts which may result upon a release.
5.5
Sensitivity Control Register
Table 5.6 Sensitivity Control Register
ADDR 1Fh
R/W R/W
REGISTER Sensitivity Control
B7 -
B6
B5
B4
B3
B2
B1
B0
DEFAULT 2Fh
DELTA_SENSE[2:0]
BASE_SHIFT[3:0]
The Sensitivity Control register controls the sensitivity of a touch detection. Bits 6- 4 DELTA_SENSE[2:0] - Controls the sensitivity of a touch detection. The sensitivity settings act to scale the relative delta count value higher or lower based on the system parameters. A setting of 000b is the most sensitive while a setting of 111b is the least sensitive. At the more sensitive settings, www..com touches are detected for a smaller delta C corresponding to a "lighter" touch. These settings are more sensitive to noise however and a noisy environment may flag more false touches than higher sensitivity levels. APPLICATION NOTE: A value of 128x is the most sensitive setting available. At the most sensitivity settings, the MSB of the Delta Count register represents 64 out of ~25,000 which corresponds to a touch of approximately 0.25% of the base capacitance (or a C of 25fF from a 10pF base capacitance). Conversely a value of 1x is the least sensitive setting available. At these
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settings, the MSB of the Delta Count register corresponds to a delta count of 8192 counts out of ~25,000 which corresponds to a touch of approximately 33% of the base capacitance (or a C of 3.33pF from a 10pF base capacitance).
Table 5.7 DELTA_SENSE Bit Decode DELTA_SENSE[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 SENSITIVITY MULTIPLIER 128x (most sensitive) 64x 32x (default) 16x 8x 4x 2x 1x - (least sensitive)
Bits 3 - 0 - BASE_SHIFT[3:0] - Controls the scaling and data presentation of the Base Count registers. The higher the value of these bits, the larger the range and the lower the resolution of the data presented. The scale factor represents the multiplier to the bit-weighting presented in these register descriptions. APPLICATION NOTE: The BASE_SHIFT[3:0] bits normally do not need to be updated. These settings will not affect touch detection or sensitivity. These bits are sometimes helpful in analyzing the Cap Sensing board performance and stability.
Table 5.8 BASE_SHIFT Bit Decode BASE_SHIFT[3:0] 3 0 0 0 0 0 0 www..com 0 0 1 2 0 0 0 0 1 1 1 1 0 All others 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 DATA SCALING FACTOR 1x 2x 4x 8x 16x 32x 64x 128x 256x 256x (default = 1111b)
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5.6
Configuration Register
Table 5.9 Configuration Register
ADDR 20h
R/W R/W
REGISTER Configuration
B7 TIMEOUT
B6 -
B5 BLK_ DIG_ NOISE
B4 BLK_ ANA_ NOISE
B3 MAX_DUR_ EN
B2 -
B1 -
B0 -
DEFAULT 20h
The Configuration register controls general global functionality that affects the entire device. Bit 7 - TIMEOUT - Enables the timeout and idle functionality of the SMBus protocol. `0' (default) - The SMBus timeout and idle functionality are disabled. The SMBus interface will not time out if the clock line is held low. Likewise, it will not reset if both the data and clock lines are held high for longer than 150us. This is used for I2C compliance. `1' - The SMBus timeout and idle functionality are enabled. The SMBus interface will time out if the clock line is held low for longer than 30ms. Likewise, it will reset if both the data and clock lines are held high for longer than 150us. Bit 5 - BLK_DIG_NOISE - Determines whether the digital noise threshold is used by the device. `0' - The digital noise threshold is used. If a delta count value exceeds the noise threshold but does not exceed the touch threshold, then the sample is discarded and not used for the automatic recalibration routine. `1' (default) - The noise threshold is not used. Any delta count that is less than the touch threshold is used for the automatic re-calibration routine. Bit 4 - BLK_ANA_NOISE - Determines whether the analog noise flag setting will block a touch detection as well as the analog calibration routine. `0' (default) - If the analog noise bit is set, then a touch is blocked on the corresponding channel and will force the analog calibration routine to retry. `1' - A touch is not blocked even if the analog noise bit is set. Likewise, the analog calibration routine will not retry if the analog noise bit is set. Bit 3 - MAX_DUR_EN - Determines whether the maximum duration recalibration is enabled for nongrouped sensors. `0' (default) - The maximum duration recalibration functionality is disabled. A touch may be held indefinitely and no re-calibration will be performed on any sensor. `1' - The maximum duration recalibration functionality is enabled. If a touch is held for longer than the MAX_DUR bit settings, then the re-calibration routine will be restarted (see Section 5.8).
5.7
Sensor Enable Registers
Table 5.10 Sensor Enable Registers
ADDR
R/W
REGISTER
B7 -
B6 -
B5 CS6_EN
B4 CS5_EN
B3 CS4_EN
B2 CS3_EN
B1 CS2_EN
B0 CS1_EN
DEFAULT 3Fh
www..com 21h R/W Sensor Enable
The Sensor Enable registers determine whether a Capacitive Touch Sensor input is included in the sampling cycle. The length of the sampling cycle is not affected by the number of sensors measured. Bit 5 - CS6_EN - Enables the CS6 input to be included during the sampling cycle. `0' - The CS6 input is not included in the sampling cycle.
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`1' (default) - The CS6 input is included in the sampling cycle. Bit 4 - CS5_EN - Enables the CS5 input to be included during the sampling cycle. Bit 3 - CS4_EN - Enables the CS4 input to be included during the sampling cycle. Bit 2 - CS3_EN - Enables the CS3 input to be included during the sampling cycle. Bit 1 - CS2_EN - Enables the CS2 input to be included during the sampling cycle. Bit 0 - CS1_EN - Enables the CS1 input to be included during the sampling cycle.
5.8
Sensor Configuration Register
Table 5.11 Sensor Configuration Register
ADDR 22h
R/W R/W
REGISTER Sensor Configuration
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT A4h
MAX_DUR[3:0]
RPT_RATE[3:0]
The Sensor Configuration Register controls timings associated with the Capacitive Sensor channels 1 - 6. Bits 7 - 4 - MAX_DUR[3:0] - (default 1010b) - Determines the maximum time that a sensor is allowed to be touched until the Capacitive Touch sensor is recalibrated as shown in Table 5.12.
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Table 5.12 MAX_DUR Bit Decode MAX_DUR[3:0] 3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 TIME BEFORE RECALIBRATION 560ms 840ms 1120ms 1400ms 1680ms 2240ms 2800ms 3360ms 3920ms 4480ms 5600ms 6720ms 7840ms 8906ms 10080ms 11200ms
Bits 3 - 0 - RPT_RATE[3:0] - (default 0100b) Determines the time duration between interrupt assertions when auto repeat is enabled. The resolution is 35ms the range is from 35ms to 560ms as shown in Table 5.13.
Table 5.13 RPT_RATE Bit Decode RPT_RATE[3:0] OR M_PRESS[3:0] 3 0 0 0 www..com 0 0 0 0 2 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 0 INTERRUPT REPEAT RATE OR M_PRESS TIME 35ms 70ms 105ms 140ms 175ms 210ms 245ms
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Table 5.13 RPT_RATE Bit Decode (continued) RPT_RATE[3:0] OR M_PRESS[3:0] 3 0 1 1 1 1 1 1 1 1 2 1 0 0 0 0 1 1 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 INTERRUPT REPEAT RATE OR M_PRESS TIME 280ms 315ms 350ms 385ms 420ms 455ms 490ms 525ms 560ms
5.9
Sensor Configuration 2 Register
Table 5.14 Sensor Configuration 2 Register
ADDR 23h
R/W R/W
REGISTER Sensor Configuration 2
B7 -
B6 -
B5 -
B4 -
B3
B2
B1
B0
DEFAULT 07h
M_PRESS[3:0]
Bits 3- 0 - M_PRESS[3:0] - (default 0111b) - Determines the minimum amount of time that sensors configured to use auto repeat must detect a sensor touch to detect a "press and hold" event. If the sensor detects a touch for longer than the M_PRESS[3:0] settings, then a "press and hold" event is detected. This is the maximum amount of time that sensors can detect a sensor touch to differentiate between a "touch" and a "press and hold". If a sensor detects a touch for less than or equal to the M_PRESS[3:0] settings, then a touch event is detected. The resolution is 35ms the range is from 35ms to 560ms as shown in Table 5.13.
5.10
Averaging and Sampling Configuration Register
Table 5.15 Averaging and Sampling Configuration Register
ADDR 24h
R/W R/W
REGISTER Averaging and Sampling Config
B7
B6
B5
B4 AVG[2:0]
B3
B2 SAMP_ TIME
B1
B0
DEFAULT 1Dh
www..com
CYCLE_TIME [1:0]
The Averaging and Sampling Configuration register controls the number of samples taken and the total sensor cycle time for all active sensors while the device is functioning normally. Bits 5 - 3 - AVG[2:0] - Determines the number of samples that are taken for all active channels during the sensor cycle as shown in Table 5.16. All samples are taken consecutively on the same channel
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before the next channel is sampled and the result is averaged over the number of samples measured before updating the measured results. For example, if CS1, CS2, and CS3 are sampled during the sensor cycle, and the AVG[2:0] bits are set to take 4 samples per channel, then the full sensor cycle will be: CS1, CS1, CS1, CS1, CS2, CS2, CS2, CS2, CS3, CS3, CS3, CS3.
Table 5.16 AVG Bit Decode AVG[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 NUMBER OF SAMPLES TAKEN PER MEASUREMENT 1 2 4 8 (default) 16 32 64 128
Bit 2 - SAMP_TIME - Determines the time to take a single sample. `0' - The sampling time is ~2.56ms. `1' (default) - The sampling time is ~1.28ms. Bits 1 - 0 - CYCLE_TIME[1:0] - Determines the overall cycle time for all measured channels during normal operation as shown in Table 5.17. All measured channels are sampled at the beginning of the cycle time. If additional time is remaining, then the device is placed into a lower power state for the remaining duration of the cycle.
Table 5.17 CYCLE_TIME Bit Decode CYCLE_TIME[1:0] 1 0 0 1 1 0 0 1 0 1 OVERALL CYCLE TIME 35ms 70ms (default) 105ms 140ms
www..com APPLICATION NOTE: The programmed cycle time is only maintained if the total averaging time for all samples is less than the programmed cycle. The AVG[2:0] bits will take priority so that if more samples are required than would normally be allowed during the cycle time, the cycle time will be extended as necessary to accommodate the number of samples to be measured.
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5.11
Calibration Activate Registers
Table 5.18 Calibration Activate Registers
ADDR 26h
R/W R/W
REGISTER Calibration Activate
B7 -
B6 -
B5 CS6_CAL
B4 CS5_CAL
B3 CS4_CAL
B2 CS3_CAL
B1 CS2_CAL
B0 CS1_CAL
DEFAULT FFh
The Calibration Activate register force the respective sensors to be re-calibrated. When a bit is set, the corresponding Capacitive Touch Sensor will be re-calibrated and the bit will be automatically cleared once the re-calibration routine has finished. During the re-calibration routine, the sensors will not detect a press for up to 600ms and the Sensor Base Count register values will be invalid. During this time, any press on the corresponding sensors will invalidate the re-calibration. Bit 5 - CS6_CAL - When set, the CS6 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 4 - CS5_CAL - When set, the CS5 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 3 - CS4_CAL - When set, the CS4 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 2 - CS3_CAL - When set, the CS3 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 1 - CS2_CAL - When set, the CS2 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 0 - CS1_CAL - When set, the CS1 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully.
5.12
Interrupt Enable Register
Table 5.19 Interrupt Enable Register
ADDR 27h
R/W R/W
REGISTER Interrupt Enable
B7 -
B6 -
B5 CS6_ INT_EN
B4 CS5_ INT_EN
B3 CS4_ INT_EN
B2 CS3_ INT_EN
B1 CS2_ INT_EN
B0 CS1_ INT_EN
DEFAULT 3Fh
The Interrupt Enable registers determine whether a sensor touch or release causes the interrupt pin to be asserted. Bit 5 - CS6_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS6 (associated with the CS6 status bit). `0' - The interrupt pin will not be asserted if a touch is detected on CS6 (associated with the CS6 status bit).
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`1' (default) - The interrupt pin will be asserted a touch is detected on CS6 (associated with the CS6 status bit). Bit 4 - CS5_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS5 (associated with the CS5 status bit). Bit 3 - CS4_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS4 (associated with the CS4 status bit).
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Bit 2 - CS3_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS3 (associated with the CS3 status bit). Bit 1 - CS2_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS2 (associated with the CS2 status bit). Bit 0 - CS1_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS1 (associated with the CS1 status bit).
5.13
Repeat Rate Enable Register
Table 5.20 Repeat Rate Enable Register
ADDR 28h
R/W R/W
REGISTER Repeat Rate Enable
B7 -
B6 -
B5 CS6_ RPT_EN
B4 CS5_ RPT_EN
B3 CS4_ RPT_EN
B2 CS3_ RPT_EN
B1 CS2_ RPT_EN
B0 CS1_ RPT_EN
DEFAULT 3Fh
The Repeat Rate Enable register determines the interrupt behavior of the buttons as described in Section 4.3.1. Bit 5 - CS6_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 6. `0' - The repeat rate for CS6 is disabled. It will only generate an interrupt when a touch is detected and when a release is detected no matter how long the touch is held for. `1' (default) - The repeat rate for CS6 is enabled. In the case of a "touch" event, it will generate an interrupt when a touch is detected and a release is detected. In the case of a "press and hold" event, it will generate an interrupt when a touch is detected and at the repeat rate so long as the touch is held. It will not generate an interrupt when a release is detected. Bit 4 - CS5_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 5. Bit 3 - CS4_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 4. Bit 2 - CS3_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 3. Bit 1 - CS2_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 2. Bit 0 - CS1_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 1.
5.14
Multiple Touch Configuration Register
Table 5.21 Multiple Touch Configuration
ADDR 2Ah
R/W R/W
REGISTER Multiple Touch Config
B7 MULT_ BLK_EN
B6 -
B5 -
B4 -
B3
B2
B1 -
B0 -
DEFAULT 80h
B_MULT_T[1:0]
The Multiple Touch Configuration register controls the settings for the multiple touch detection circuitry. www..com These settings determine the number of simultaneous buttons that may be pressed before action is taken. Bit 7 - MULT_BLK_EN - Enables the multiple button blocking circuitry. `0' - The multiple touch circuitry is disabled. The device will not block multiple touches. `1' (default)- The multiple touch circuitry is enabled. The device will accept the number of touches equal to programmed multiple touch threshold and block all others. It will remember which sensor is valid and block all others until that sensor has been released.
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Bits 3 - 2 - B_MULT_T[1:0] - Determines the number of simultaneous touches on all sensors before a Multiple Touch Event is detected and sensors are blocked. The bit decode is given by Table 5.22.
Table 5.22 B_MULT_T Bit Decode B_MULT_T[1:0] 1 0 0 1 1 0 0 1 0 1 NUMBER OF SIMULTANEOUS TOUCHES 1 (default) 2 3 4
5.15
Recalibration Configuration Register
Table 5.23 Recalibration Configuration Registers
ADDR 2Fh
R/W R/W
REGISTER Recalibration Configuration
B7 BUT_ LD_TH
B6 -
B5 -
B4
B3
B2
B1 CAL_CFG[2:0]
B0
DEFAULT 8Bh
NEG_DELTA_ CNT[1:0]
The Recalibration Configuration register controls the automatic re-calibration routine settings as well as advanced controls to program the Sensor Threshold register settings. Bit 7 - BUT_LD_TH - Enables setting all Sensor Threshold registers by writing to the Sensor 1 Threshold register. `0' - Each Sensor X Threshold register is updated individually. `1' (default) - Writing the Sensor 1 Threshold register will automatically overwrite the Sensor Threshold registers for all sensors (Sensor Threshold 1 through Sensor Threshold 6). The individual Sensor X Threshold registers (Sensor 2 Threshold through Sensor 6 Threshold) can be individually updated at any time. Bits 4 - 3 - NEG_DELTA_CNT[1:0] - Determines the number of negative delta counts necessary to trigger a digital re-calibration as shown in Table 5.24.
Table 5.24 NEG_DELTA_CNT Bit Decode NEG_DELTA_CNT[1:0] 1 0 0 1 0 1 NUMBER OF CONSECUTIVE NEGATIVE DELTA COUNT VALUES 8 16 (default) 32 None (disabled)
www..com
0 0 1 1
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Bits 2 - 0 - CAL_CFG[2:0] - Determines the update time and number of samples of the automatic recalibration routine. The settings applies to all sensors universally (though individual sensors can be configured to support re-calibration - see Section 5.11).
Table 5.25 CAL_CFG Bit Decode CAL_CFG[2:0] 2 0 0 0 0 1 1 1 1 Note 5.1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 RECALIBRATION SAMPLES (SEE Note 5.1) 16 32 64 256 256 256 256 256
UPDATE TIME (SEE Note 5.2) 16 32 64 256 (default) 1024 2048 4096 7936
Recalibration Samples refers to the number of samples that are measured and averaged before the Base Count is updated however does not control the base count update period. Once this target number of update cycles is reached, the device may wait additional time as determined by the Update Time before the base count is updated as determiend by the settings. Update Time refers to the amount of time (in polling cycle periods) that elapses before the Base Count is updated. For those settings that have the Update Time greater than the Recalibration Samples value, the device will wait (and continue to average the updated base count) until the Update Time has elapsed before the base count is updated.
Note 5.2
5.16
Sensor Threshold Registers
Table 5.26 Sensor Threshold Registers
ADDR 30h 31h 32h
R/W R/W R/W R/W
REGISTER Sensor 1 Threshold Sensor 2 Threshold
B7 -
B6 64 64 64 64 64 64
B5 32 32 32 32 32 32
B4 16 16 16 16 16 16
B3 8 8 8 8 8 8
B2 4 4 4 4 4 4
B1 2 2 2 2 2 2
B0 1 1 1 1 1 1
DEFAULT 40h 40h 40h 40h 40h 40h
Sensor 3 Threshold www..com Sensor 4 33h R/W Threshold 34h 35h R/W R/W Sensor 5 Threshold Sensor 6 Threshold
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The Sensor Threshold registers store the delta threshold that is used to determine if a touch has been detected. When a touch occurs, the input signal of the corresponding sensor changes due to the capacitance associated with a touch. If the sensor input change exceeds the threshold settings, then a touch is detected. When the BUT_LD_TH bit is set (see Section 5.15 - bit 7), writing data to the Sensor 1 Threshold register will update all of the sensor threshold registers (31h - 37h inclusive).
5.17
Sensor Noise Threshold Registers
Table 5.27 Sensor Noise Threshold Registers
ADDR 38h 39h
R/W R/W R/W
REGISTER Sensor Noise Threshold 1 Sensor Noise Threshold 2
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT 55h 55h
CS4_BN_TH [1:0] 0 1
CS3_BN_TH [1:0] 0 1
CS2_BN_TH [1:0] CS6_BN_TH [1:0]
CS1_BN_TH [1:0] CS5_BN_TH [1:0]
The Sensor Noise Threshold registers control the value of a secondary internal threshold to detect noise and improve the automatic recalibration routine. If a Capacitive Touch Sensor output exceeds the Sensor Noise Threshold but does not exceed the sensor threshold, then it is determined to be caused by a noise spike. That sample is not used by the automatic re-calibration routine. The Sensor Noise Threshold is proportional to the programmed threshold as shown in Table 5.28.
Table 5.28 CSx_BN_TH Bit Decode CSX_BN_TH[1:0] 1 0 0 1 1 0 0 1 0 1 THRESHOLD DIVIDE SETTING 25% 37.5% (default) 50% 62.5%
5.17.1
Sensor Noise Threshold 1 Register
The Sensor Noise Threshold 1 register controls the noise threshold for Capacitive Touch Sensors 1-4. Bits 7-6 - CS4_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 4. Bits 5-4 - CS3_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 3.
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Bits 3-2 - CS2_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 2. Bits 1-0 - CS1_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 1.
5.17.2
Sensor Noise Threshold 2 Register
The Sensor Noise Threshold 2 register controls the noise threshold for Capacitive Touch Sensors 5 - 6. Bits 3-2 - CS6_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 6.
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Bits 1-0 - CS5_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 5.
5.18
Standby Channel Register
Table 5.29 Standby Channel Register
ADDR 40h
R/W R/W
REGISTER Standby Channel
B7 -
B6 -
B5 CS6_ STBY
B4 CS5_ STBY
B3 CS4_ STBY
B2 CS3_ STBY
B1 CS2_ STBY
B0 CS1_ STBY
DEFAULT 00h
The Standby Channel register controls which (if any) Capacitive Touch Sensors are active during Standby. Bit 5 - CS6_STBY - Controls whether the CS6 channel is active in Standby. `0' (default) - The CS6 channel not be sampled during Standby mode. `1' - The CS6 channel will be sampled during Standby Mode. It will use the Standby threshold setting, and the standby averaging and sensitivity settings. Bit 4 - CS5_STBY - Controls whether the CS5 channel is active in Standby. Bit 3 - CS4_STBY - Controls whether the CS4 channel is active in Standby. Bit 2 - CS3_STBY - Controls whether the CS3 channel is active in Standby. Bit 1 - CS2_STBY - Controls whether the CS2 channel is active in Standby. Bit 0 - CS1_STBY - Controls whether the CS1 channel is active in Standby.
5.19
Standby Configuration Register
Table 5.30 Standby Configuration Register
ADDR
R/W
REGISTER Standby Configuration
B7 AVG_ SUM
B6
B5
B4
B3
B2 STBY_ SAMP_ TIME
B1
B0
DEFAULT
41h
R/W
-
STBY_AVG[2:0]
STBY_CY_TIME [1:0]
1Dh
The Standby Configuration register controls averaging and cycle time for those sensors that are active in Standby. Bit 7 - AVG_SUM - Determines whether the active sensors will average the programmed number of samples or whether they will accumulate for the programmed number of samples. `0' - (default) - The active sensor delta count values will be based on the average of the programmed number of samples when compared against the threshold. `1' - The active sensor delta count values will be based on the summation of the programmed number of samples when compared against the threshold. Bits 5 - 3 - STBY_AVG[2:0] - Determines the number of samples that are taken for all active channels during the sensor cycle as shown in Table 5.31. All samples are taken consecutively on the same channel before the next channel is sampled and the result is averaged over the number of samples measured before updating the measured results.
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Table 5.31 STBY_AVG Bit Decode STBY_AVG[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 NUMBER OF SAMPLES TAKEN PER MEASUREMENT 1 2 4 8 (default) 16 32 64 128
Bit 2 - STBY SAMP_TIME - Determines the time to take a single sample when the device is in Standby. `0' - The sampling time is ~2.56ms. `1' (default) - The sampling time is ~1.28ms. Bits 1 - 0 - STBY_CY_TIME[2:0] - Determines the overall cycle time for all measured channels during normal operation as shown in Table 5.17. All measured channels are sampled at the beginning of the cycle time. If additional time is remaining, then the device is placed into a lower power state for the remaining duration of the cycle.
Table 5.32 STBY_CY_TIME Bit Decode STBY_CY_TIME[1:0] 1 0 0 1 1 0 0 1 0 1 OVERALL CYCLE TIME 35ms 70ms (default) 105ms 140ms
APPLICATION NOTE: The programmed cycle time is only maintained if the total averaging time for all samples is less than the programmed cycle. The STBY_AVG[2:0] bits will take priority so that if more samples are required than would normally be allowed during the cycle time, the cycle time will be extended as necessary to accommodate the number of samples to be measured.
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5.20
Standby Sensitivity Register
Table 5.33 Standby Configuration Register
ADDR 42h
R/W R/W
REGISTER Standby Sensitivity
B7 -
B6 -
B5 -
B4 -
B3 -
B2
B1
B0
DEFAULT 02h
STBY_SENSE[2:0]
The Standby Sensitivity register controls the sensitivity for sensors that are active in Standby. Bits 2 - 0 - STBY_SENSE[2:0] - Controls the sensitivity for sensors that are active in Standby. The sensitivity settings act to scale the relative delta count value higher or lower based on the system parameters. A setting of 000b is the most sensitive while a setting of 111b is the least sensitive. At the more sensitive settings, touches are detected for a smaller delta C corresponding to a "lighter" touch. These settings are more sensitive to noise however and a noisy environment may flag more false touches than higher sensitivity levels. APPLICATION NOTE: A value of 128x is the most sensitive setting available. At the most sensitivity settings, the MSB of the Delta Count register represents 64 out of ~25,000 which corresponds to a touch of approximately 0.25% of the base capacitance (or a C of 25fF from a 10pF base capacitance). Conversely a value of 1x is the least sensitive setting available. At these settings, the MSB of the Delta Count register corresponds to a delta count of 8192 counts out of ~25,000 which corresponds to a touch of approximately 33% of the base capacitance (or a C of 3.33pF from a 10pF base capacitance).
Table 5.34 STBY_SENSE Bit Decode STBY_SENSE[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 SENSITIVITY MULTIPLIER 128x (most sensitive) 64x 32x (default) 16x 8x 4x 2x 1x - (least sensitive)
5.21
Standby Threshold Register
Table 5.35 Standby Threshold Register
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ADDR 43h
R/W R/W
REGISTER Standby Threshold
B7 -
B6 64
B5 32
B4 16
B3 8
B2 4
B1 2
B0 1
DEFAULT 40h
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The Standby Threshold registers stores the delta threshold that is used to determine if a touch has been detected. When a touch occurs, the input signal of the corresponding sensor changes due to the capacitance associated with a touch. If the sensor input change exceeds the threshold settings, then a touch is detected.
5.22
Sensor Base Count Registers
Table 5.36 Sensor Base Count Registers
ADDR 50h 51h 52h 53h 54h 55h
R/W R R R R R R
REGISTER Sensor 1 Base Count Sensor 2 Base Count Sensor 3 Base Count Sensor 4 Base Count Sensor 5 Base Count Sensor 6 Base Count
B7 128 128 128 128 128 128
B6 64 64 64 64 64 64
B5 32 32 32 32 32 32
B4 16 16 16 16 16 16
B3 8 8 8 8 8 8
B2 4 4 4 4 4 4
B1 2 2 2 2 2 2
B0 1 1 1 1 1 1
DEFAULT C8h C8h C8h C8h C8h C8h
The Sensor Base Count registers store the calibrated "Not Touched" input value from the Capacitive Touch Sensor inputs. These registers are periodically updated by the re-calibration routine. The routine uses an internal adder to add the current count value for each reading to the sum of the previous readings until sample size has been reached. At this point, the upper 16 bits are taken and used as the Sensor Base Count. The internal adder is then reset and the re-calibration routine continues. The data presented is determined by the BASE_SHIFT[3:0] bits (see Section 5.5). APPLICATION NOTE:
5.23
Product ID Register
Table 5.37 Product ID Register
ADDR
R/W
REGISTER Product ID CAP1006
B7 0 0
B6 1 1
B5 0 0
B4 0 0
B3 0 0
B2 1 1
B1 0 0
B0 0 1
DEFAULT 44h 45h
R w w w .FDh t a S h e e t 4 U . c o m Da Product ID CAP1005
The Product ID register stores a unique 8-bit value that identifies the device.
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5 and 6 Channel Capacitive Touch Sensor Datasheet
5.24
Manufacturer ID Register
Table 5.38 Vendor ID Register
ADDR FEh
R/W R
REGISTER Manufacturer ID
B7 0
B6 1
B5 0
B4 1
B3 1
B2 1
B1 0
B0 1
DEFAULT 5Dh
The Vendor ID register stores an 8-bit value that represents SMSC.
5.25
Revision Register
Table 5.39 Revision Register
ADDR FFh
R/W R
REGISTER Revision
B7 1
B6 0
B5 0
B4 0
B3 0
B2 0
B1 0
B0 1
DEFAULT 81h
The Revision register stores an 8-bit value that represents the part revision.
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5 and 6 Channel Capacitive Touch Sensor Datasheet
Chapter 6 Package Information
6.1 CAP1006 and CAP1005 Package Drawings
Figure 6.1 10-Pin DFN 3mm x 3mm Package Drawing
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5 and 6 Channel Capacitive Touch Sensor Datasheet
Figure 6.2 10-Pin DFN 3mm x 3mm Package Dimensions
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Figure 6.3 10-Pin DFN 3mm x 3mm PCB Footprint
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5 and 6 Channel Capacitive Touch Sensor Datasheet
6.2
Package Marking
TOP
LINE 1: Device ID, First 2 of last 6 digits of Lot Number LINE 2: Last 4 digits of Lot Number
12
2x 0.6
e4
PIN 1
PB-FREE/GREEN SYMBOL (Ni/Pd PP-LF) LINES 1 & 2: CENTER HORIZONTAL ALIGNMENT LINE 3: AS SHOWN
BOTTOM BOTTOM MARKING IS NOT ALLOWED
Figure 6.4 CAP1006-1 Package Markings
TOP
LINE 1: Device ID, First 2 of last 6 digits of Lot Number LINE 2: Last 4 digits of Lot Number
13
2x 0.6
e4
PIN 1
PB-FREE/GREEN SYMBOL (Ni/Pd PP-LF) LINES 1 & 2: CENTER HORIZONTAL ALIGNMENT LINE 3: AS SHOWN
BOTTOM BOTTOM MARKING IS NOT ALLOWED
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Figure 6.5 CAP1006-2 Package Markings
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5 and 6 Channel Capacitive Touch Sensor
Datasheet
TOP
LINE 1: Device ID, First 2 of last 6 digits of Lot Number LINE 2: Last 4 digits of Lot Number
11
2x 0.6
e4
PIN 1
PB-FREE/GREEN SYMBOL (Ni/Pd PP-LF) LINES 1 & 2: CENTER HORIZONTAL ALIGNMENT LINE 3: AS SHOWN
BOTTOM BOTTOM MARKING IS NOT ALLOWED
Figure 6.6 CAP1005 Package Markings
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Datasheet
Chapter 7 Revision History
Table 7.1 Customer Revision History REVISION LEVEL & DATE Rev. 1.1 (08-05-09) SECTION/FIGURE/ENTRY Features General Description Table 2.2, "Electrical Specifications" CORRECTION "TBD" replaced with "3uA" under Low Power Operation Deep sleep drawing "5uA" of current changed to "3uA" Table updated: - Current Measurement, ISTBY - changed the typical column to 160, max to 210. Changed the conditions to read: " Standby state active, one sensor monitored, default conditions (8 avg, 70ms cycle time)" - Current Measurement, IDSLEEP -changed the TYP column value to 3 and max to 10. Section 3.1.1, "SMBus (I2C) Communications" Section 6.2, "Package Marking" Rev. 1.0 (06-16-09) Document title modified; reel size added to ordering information; updates to pinout, general description and register set. "System RESET pin" removed from features Chapter 1, Pin Description Table 2.1, "Absolute Maximum Ratings" Figure 3.1, "SPI Timing" Section 3.6, "BC-Link Interface (CAP1006-2 only)" Chapter 4, General Description Section 4.1, "Power States" Table 5.1, "Register Set in Hexadecimal Order" Section 6.2, "Package Marking" Rev. 0.56 (5/1/09) General Section 5.5, "Sensitivity Control Register"
Revision 1.1 (08-05-09) 52
The following text deleted: "The SPI_CS# pin is not used and any data presented to this pin will be ignored." Updated package markings per new standards
Pin tables modified adding SPI to "ALERT# / BC_IRQ#" pin Notes following table modified Updated figure Removed "8051" from 2nd paragraph Second to last paragraph removed, not needed as clarification follows Removed mention of LED driver outputs Updated text and register descriptions for incorrect #'s Cap Sense channels Updated package markings Fixed typos and updated text as necessary. Cleaned up system diagrams Renamed bit fields
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5 and 6 Channel Capacitive Touch Sensor
Datasheet
Table 7.1 Customer Revision History (continued) REVISION LEVEL & DATE SECTION/FIGURE/ENTRY Section 5.6, "Configuration Register" Rev. 0.53 (4/23/09) Rev. 0.52 (4/17/09) Section 3.4, "SPI Interface (CAP1005 only)" General CORRECTION Renamed bits 5 and 6 Updated section to describe Normal operation Initial document creation
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DATASHEET

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